About
Positions
Senior Layout Design Engineer Feb 2025 -
In my current role I am involved in projects delivering IPs (Voltage Monitor, Temperature Sensor, Glitch Detector) implemented in advanced tech nodes (TSMC 2nm, Intel 1.8nm) to industry customers
Education
Cornell University 2017 - 2022
Field of study: Applied Physics
Degree: Master of Science
IIT Bombay 2013 - 2017
Field of study: Electrical Engineering
Degree: Bachelor of Technology
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